Power supply noise analysis methodology for deep-submicron VLSI chip design
DAC '97 Proceedings of the 34th annual Design Automation Conference
The Chebyshev expansion based passive model for distributed interconnect networks
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Analysis of Multiconductor Transmission Lines
Analysis of Multiconductor Transmission Lines
Interconnect and noise immunity design for the Pentium 4 processor
Proceedings of the 40th annual Design Automation Conference
Closed-form expressions of distributed RLC interconnects for analysis of on-chip inductance effects
Proceedings of the 41st annual Design Automation Conference
PRIMA: passive reduced-order interconnect macromodeling algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Harmony: static noise analysis of deep submicron digital integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Timing analysis with crosstalk is a fixpoint on a complete lattice
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
This paper presents a new mathematical approach to modeling EM wave coupling noise so that it can be easily integrated into chip-level noise analysis tools. The new method employs Chebyshev approximation technique to model the distributed sources arising in the Telegrapher's equations due to EM wave coupling. A uniform plane wave illumination metric is provided to determine the order of approximation. Closed-form formulas for the noise transfer functions' moments are derived. By utilizing the formulated moments, reduced order models can be efficiently obtained to generate the induced noise caused by EM wave illumination. The accuracy of the proposed method is verified by Hspice simulation.