Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Design patterns: elements of reusable object-oriented software
Design patterns: elements of reusable object-oriented software
Effective C++ CD
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
A Programmable ANSI C Transformation Engine
CC '99 Proceedings of the 8th International Conference on Compiler Construction, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS'99
Pebble: A Language for Parametrised and Reconfigurable Hardware Design
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
Stream-Oriented FPGA Computing in the Streams-C High Level Language
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Combining Imperative and Declarative Hardware Descriptions
HICSS '03 Proceedings of the 36th Annual Hawaii International Conference on System Sciences (HICSS'03) - Track 9 - Volume 9
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Compiling Policy Descriptions into Reconfigurable Firewall Processors
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SOFSEM '09 Proceedings of the 35th Conference on Current Trends in Theory and Practice of Computer Science
A compiler intermediate representation for reconfigurable fabrics
International Journal of Parallel Programming
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Hardware compilers for high-level languages are increasingly recognised to be the key to reducing the productivity gap for advanced circuit development in general, and for reconfigurable designs in particular. This paper explains how customisable frameworks for hardware compilation can enable rapid design exploration, and reusable and extensible hardware optimisation. It describes such a framework, based on a parallel imperative language, which supports multiple levels of design abstraction, transformational development, optimisation by compiler passes, and metalanguage facilities. Our approach has been used in producing designs for applications such as signal and image processing, with different trade-offs in performance and resource usage.