Application defined processors
Linux Journal
CHiMPS: a high-level compilation flow for hybrid CPU-FPGA architectures
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Area-efficient arithmetic expression evaluation using deeply pipelined floating-point cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance and power of cache-based reconfigurable computing
Proceedings of the 36th annual international symposium on Computer architecture
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
From Silicon to Science: The Long Road to Production Reconfigurable Supercomputing
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Implementation of a programming environment with a multithread model for reconfigurable systems
ACM SIGARCH Computer Architecture News
High-level synthesis of in-circuit assertions for verification, debugging, and timing analysis
International Journal of Reconfigurable Computing - Special issue on selected papers from the 17th reconfigurable architectures workshop (RAW2010)
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This paper describes application development for the SRC-6 system. Programs are written in high level programming languages of C and Fortran. The SRC-6 architecture is described, and performance advantage of Direct Execution Logic over microprocessors is explained. Optimizations available to programmers and example codes are discussed: 1) string searching, 2) median filter-edge detector.