Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logic

  • Authors:

  • Egas Henes Neto;Ivandro Ribeiro;Michele Vieira;Gilson Wirth;Fernanda Lima Kastensmidt

  • Affiliations:

  • Universidade Estadual do Rio Grande do Sul, Brazil;Universidade Estadual do Rio Grande do Sul, Brazil;Universidade Estadual do Rio Grande do Sul, Brazil;Universidade Estadual do Rio Grande do Sul, Brazil;Universidade Federal do Rio Grande do Sul, Brazil

  • Venue:
  • SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
  • Year:
  • 2005

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Abstract

In this paper, we propose a new approach for using Built-in Current Sensor (BICS) to detect not only transient upsets in sequential logic but also in combinational circuits. In this approach, the BICS is connected in the design bulk to increase its sensitivity to detect any current discrepancy that may occur during a charged particle strike. In addition, the proposed BICS can inform if the upset has occurred in the PMOS or NMOS transistors, which can generate a more precise evaluation of the corrupted region. The proposed approach was validated by Spice simulation. The BICS and the case-studied circuits were designed in the 100nm CMOS technology. The bulk BIC sensor detects various shapes of current pulses generated due to charged particle strike. Results show that the proposed bulk BICS presents minor penalties for the design in terms of area, performance and power consumption and it has high detection sensitivity.