REPLICA2Pro: task relocation by bitstream manipulation in virtex-II/Pro FPGAs
Proceedings of the 3rd conference on Computing frontiers
An EDF schedulability test for periodic tasks on reconfigurable hardware devices
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer
Journal of VLSI Signal Processing Systems
Hard real-time reconfiguration port scheduling
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 44th annual Design Automation Conference
A dynamic reconfigurable hardware/software architecture for object tracking in video streams
EURASIP Journal on Embedded Systems
Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
A multilayer framework supporting autonomous run-time partial reconfiguration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Offline and online aspects of defragmenting the module layout of a partially reconfigurable device
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Customized kernel execution on reconfigurable hardware for embedded applications
Microprocessors & Microsystems
An interface for a decentralized 2d reconfiguration on xilinx virtex-FPGAs for organic computing
International Journal of Reconfigurable Computing - Selected papers from ReCoSoc08
Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Virtualization within a parallel array of homogeneous processing units
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
The RecoBlock SoC platform: a flexible array of reusable run-time-reconfigurable IP-blocks
Proceedings of the Conference on Design, Automation and Test in Europe
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We present a new concept as well as the implementation of an FPGA-based reconfigurable platform, the Erlangen Slot Machine (ESM). The main advantages of this platform are: first, the possibility for each module to access its peripheries independent from its location through a programmable crossbar, and distributed SRAMs among slices. This allows an unrestricted relocation of modules on the device. Second, the intermodule structure allows an unlimited communication among running modules.