High-level specification and efficient implementation of pipelined circuits
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
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CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
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ICCL '98 Proceedings of the 1998 International Conference on Computer Languages
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Computer Architecture: A Quantitative Approach
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ICCD '01 Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors
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We describe an automatic method for synthesizing pipelined processors that optimizes throughput and automatically resolves control and data hazards. We present rules that describe how to resolve hazards based on the data dependencies between functional units. We demonstrate our method by showing optimal pipeline configurations of the DLX.