A dual-core 64b ultraSPARC microprocessor for dense server applications
Proceedings of the 41st annual Design Automation Conference
Impact of NBTI on SRAM Read Stability and Design for Reliability
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Proceedings of the 44th annual Design Automation Conference
The impact of NBTI effect on combinational circuit: modeling, simulation, and analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Joint logic restructuring and pin reordering against NBTI-induced performance degradation
Proceedings of the Conference on Design, Automation and Test in Europe
A failure prediction strategy for transistor aging
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reliability improvement of logic and clock paths in power-efficient designs
ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special Issue on Reliability and Device Degradation in Emerging Technologies and Special Issue on WoSAR 2011
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A systematic test methodology is presented that comprehends the impact of Negative Bias Temperature Instability on product parametric drift. A test guardbanding technique to estimate parameter drift under BI and customer use conditions is given.