Energy-Efficient Thread-Level Speculation

Authors:
Jose Renau;Karin Strauss;Luis Ceze;Wei Liu;Smruti R. Sarangi;James Tuck;Josep Torrellas
Affiliations:
University of California at Santa Cruz;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign
Venue:
IEEE Micro
Year:
2006

Citing 19
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Abstract

Chip multiprocessors with thread-level speculation have become the subject of intense research. This work refutes the claim that such a design is necessarily too energy inefficient. In addition, it proposes out-of-order task spawning to exploit more sources of speculative task-level parallelism.