Handbook of Applied Cryptography
Handbook of Applied Cryptography
RIPEMD-160: A Strengthened Version of RIPEMD
Proceedings of the Third International Workshop on Fast Software Encryption
A Highly Regular and Scalable AES Hardware Architecture
IEEE Transactions on Computers
ITCC '04 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04) Volume 2 - Volume 2
A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-μm CMOS technology
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Finding collisions in the full SHA-1
CRYPTO'05 Proceedings of the 25th annual international conference on Advances in Cryptology
How to break MD5 and other hash functions
EUROCRYPT'05 Proceedings of the 24th annual international conference on Theory and Applications of Cryptographic Techniques
Efficient architecture and hardware implementation of the Whirlpool hash function
IEEE Transactions on Consumer Electronics
High-speed & Low Area Hardware Architectures of the Whirlpool Hash Function
Journal of VLSI Signal Processing Systems
Compact hardware design of Whirlpool hashing core
Proceedings of the conference on Design, automation and test in Europe
RFID authentication protocol for low-cost tags
WiSec '08 Proceedings of the first ACM conference on Wireless network security
Merged computation for Whirlpool hashing
Proceedings of the conference on Design, automation and test in Europe
Accelerating the Whirlpool Hash Function Using Parallel Table Lookup and Fast Cyclical Permutation
Fast Software Encryption
Isolated WDDL: A Hiding Countermeasure for Differential Power Analysis on FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Compact ASIC Architectures for the 512-Bit Hash Function Whirlpool
Information Security Applications
An optimal probabilistic solution for information confinement, privacy, and security in RFID systems
Journal of Network and Computer Applications
A bit-slice implementation of the whirlpool hash function
CT-RSA'07 Proceedings of the 7th Cryptographers' track at the RSA conference on Topics in Cryptology
Information confinement, privacy, and security in RFID systems
ESORICS'07 Proceedings of the 12th European conference on Research in Computer Security
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Recent breakthroughs in cryptanalysis of standard hash functions like SHA-1 and MD5 raise the need for alternatives. A credible alternative to for instance SHA-1 or the SHA-2 family of hash functions is Whirlpool. Whirlpool is a hash function that has been evaluated and approved by NESSIE and is standardized by ISO/IEC. To the best of our knowledge only one FPGA implementation of Whirlpool has been published to date. This implementation is designed for high throughput rates requiring a considerable amount of hardware resources. In this article we present a compact hardware implementation of the hash function Whirlpool. The proposed architecture uses an innovative state representation that makes it possible to reduce the required hardware resources remarkably. The complete implementation requires 1456 CLB-slices and, most notably, no block RAMs.