Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Cycle-accurate macro-models for RT-level power analysis
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Cycle-accurate simulation of energy consumption in embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Microprocessor power analysis by labeled simulation
Proceedings of the conference on Design, automation and test in Europe
JouleTrack: a web based tool for software energy profiling
Proceedings of the 38th annual Design Automation Conference
Run-time power estimation in high performance microprocessors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Efficient Power Estimation Techniques for HW/SW Systems
VOLTA '99 Proceedings of the IEEE Alessandro Volta Memorial Workshop on Low-Power Design
PowerScope: A Tool for Profiling the Energy Usage of Mobile Applications
WMCSA '99 Proceedings of the Second IEEE Workshop on Mobile Computer Systems and Applications
Energy efficient system design and utilization
Energy efficient system design and utilization
Policy optimization for dynamic power management
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
An emulation-based real-time power profiling unit for embedded software
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Accelerating embedded software power profiling using run-time power emulation
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Estimation based power and supply voltage management for future RF-powered multi-core smart cards
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper, a co-processor for run-time energy estimation in system-on-a-chip designs is proposed. The estimation process is done by using power macro-models, thus making analogue measurement equipment obsolete to the software engineer once the system-on-a-chip (SOC) design is characterized. Compared to sampling-based profiling systems [17], the performance overhead of energy profiling is less, because the energy estimation is done completely parallel to the functional units residing on the SOC. The proposed methodology can be used for run-time power optimization and in-system energy profiling. The co-processor was evaluated on a SOC for MPEG layer III audio decoding and the experimental results show a maximum relative error of