Efficient loop-back testing of on-chip ADCs and DACs

Authors:
Hak-soo Yu;Jacob A. Abraham;Sungbae Hwang;Jeongjin Roh
Affiliations:
The University of Texas at Austin, Austin, TX;The University of Texas at Austin, Austin, TX;The University of Texas at Austin, Austin, TX;Hanyang University, Korea
Venue:
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Year:
2003

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Abstract

This paper presents an efficient approach to testing on-chip Analog to Digital Converters (ADCs) and Digital to Analog Converters (DACs) in loop-back mode. On-chip digital signal processing units can be used to generate stimuli. With this methodology, go/no-go tests as well as characterization of the individual ADCs and DACs are possible. The proposed approach is simple and overcomes the low parametric fault coverage of conventional loop-back tests. Simulations on a Matlab model of loop-backed converters are presented to validate the feasibility of the method.