Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Testing SRAM-Based Content Addressable Memories
IEEE Transactions on Computers
Testing and Diagnosis Methodologies for Embedded Content Addressable Memories
Journal of Electronic Testing: Theory and Applications
66MHz 2.3M Ternary Dynamic Content Addressable Memory
MTDT '00 Proceedings of the 2000 IEEE International Workshop on Memory Technology, Design and Testing
18.3 An Approach to Modeling and Testing Memories and Its Application to CAMs
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Testing content-addressable memories using functional fault models and march-like algorithms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Testing comparison and delay faults of TCAMs with asymmetric cells
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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With the increasing demand for high-performance networking application, network components such as network interfaces and routers are built in dedicated hardware modulars. Content addressable memories (CAMs) play an important role in the network components. Testing CAMs is very complicated due to their special structure. This paper presents an efficient March-like test algorithm for detecting the comparison faults of ternary CAMs based on the comparison fault models of binary CAMs. The test algorithm requires 5N Write operations, 2N Erase operations, and (3N + 2B) Compare operations for an N x B-bit TCAM.