Multi-pad power/ground network design for uniform distribution of ground bounce
DAC '98 Proceedings of the 35th annual Design Automation Conference
Design and analysis of power distribution networks in PowerPC microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Design of an efficient power distribution network for the UltraSPARC-I microprocessor
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
I/O Pad Assignment Based on the Circuit Structure
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Random walks in a supply network
Proceedings of the 40th annual Design Automation Conference
Analysis of IR-Drop Scaling with Implications for Deep Submicron P/G Network Designs
ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
Solving unsymmetric sparse systems of linear equations with PARDISO
Future Generation Computer Systems - Special issue: Selected numerical algorithms
Optimal placement of power supply pads and pins
Proceedings of the 41st annual Design Automation Conference
The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A multigrid-like technique for power grid analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Integrated microarchitectural floorplanning and run-time controller for inductive noise mitigation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Placement optimization of power supply pads based on locality
Proceedings of the Conference on Design, Automation and Test in Europe
IR-drop in on-chip power distribution networks of ICs with nonuniform power consumption
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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An efficient pad assignment algorithm to minimize voltage drop on a power distribution network is proposed. Combination of the successive pad assignment (SPA) and the incremental matrix inversion (IMI) provides an efficient assignment for both location and number of power supply pads. The SPA creates equivalent resistance matrix which preserves both pad candidates and power consumption points as external ports so that topological modification due to connection or disconnection between voltage sources and candidate pads are consistently represented. By reusing sub-matrix of equivalent matrix, the SPA greedily searches next pad location that minimizes the worst drop voltage. Each time the candidate pad is added, the IMI reduces computational complexity significantly. Experimental results show that the proposed procedures efficiently enumerate pad order in practical time.