The hardware architecture of the CRISP microprocessor
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Text compression
Optimizing an ANSI C interpreter with superoperators
POPL '95 Proceedings of the 22nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Improving code density using compression techniques
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
The SimpleScalar tool set, version 2.0
ACM SIGARCH Computer Architecture News
A text-compression-based method for code size minimization in embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Enhanced code compression for embedded RISC processors
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Compiler-driven cached code compression schemes for embedded ILP processors
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Evaluation of a high performance code compression method
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Compiler techniques for code compaction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Split-stream dictionary program compression
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Bytecode compression via profiled grammar rewriting
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Analyzing and compressing assembly code
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
A Retargetable C Compiler: Design and Implementation
A Retargetable C Compiler: Design and Implementation
A DISE implementation of dynamic code decompression
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Generation of fast interpreters for Huffman compressed bytecode
Proceedings of the 2003 workshop on Interpreters, virtual machines and emulators
Code generation and optimization for embedded digital signal processors
Code generation and optimization for embedded digital signal processors
Reducing code size with echo instructions
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
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A new instruction adapts LZ77 compression for use inside running programs. The instruction economically references and reuses code fragments that are too small to package as conventional subroutines. The compressed code is interpreted directly, with neither prior nor on-the-fly decompression. Hardware implementations seem plausible and could benefit both memory-constrained and more conventional systems. The method is extremely simple. It has been added to a pre-existing, bytecoded instruction set, and it added only 10 lines of C to the bytecode interpreter. It typically cuts code size by a third; that is, typical compression ratios are roughly 0.67×. More ambitious compressors are available, but they are more complex, which retards adoption. The current method offers a useful trade-off to these more complex systems. Copyright © 2005 John Wiley & Sons, Ltd.