Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Executing compressed programs on an embedded RISC architecture
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
New ideas for solving covering problems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Data compression via textual substitution
Journal of the ACM (JACM)
Common phrases and minimum-space text storage
Communications of the ACM
Analyzing and compressing assembly code
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
The Art of Programming Embedded Systems
The Art of Programming Embedded Systems
Compression of Embedded System Programs
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Code compression based on operand factorization
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
The processor-memory bottleneck: problems and solutions
Crossroads - Computer architecture
Configuration compression for FPGA-based embedded systems
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
A study of CodePack: optimizing embedded code space
Proceedings of the tenth international symposium on Hardware/software codesign
A DISE implementation of dynamic code decompression
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Compressed Code Execution on DSP Architectures
Proceedings of the 12th international symposium on System synthesis
Grammar-based compression of interpreted code
Communications of the ACM - Program compaction
Energy-efficient instruction set synthesis for application-specific processors
Proceedings of the 2003 international symposium on Low power electronics and design
Survey of code-size reduction methods
ACM Computing Surveys (CSUR)
Variable Instruction Set Architecture and Its Compiler Support
IEEE Transactions on Computers
Reducing code size with echo instructions
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
A hamming distance based VLIW/EPIC code compression technique
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
The implementation and evaluation of dynamic code decompression using DISE
ACM Transactions on Embedded Computing Systems (TECS)
A dictionary construction technique for code compression systems with echo instructions
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
A post-compilation register reassignment technique for improving hamming distance code compression
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
An instruction for direct interpretation of LZ77-compressed programs
Software—Practice & Experience
A software-only compression system for trading-offs between performance and code size
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
Adaptive object code compression
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Serialization-Aware Mini-Graphs: Performance with Fewer Resources
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Code compression for performance enhancement of variable-length embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Visualization of Procedural Abstraction
Electronic Notes in Theoretical Computer Science (ENTCS)
Compiler Optimization Pass Visualization: The Procedural Abstraction Case
ACM Transactions on Computing Education (TOCE) - Special Issue on the 5th Program Visualization Workshop (PVW’08)
Configuration compression for FPGA-based embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Boosting the performance of multimedia applications using SIMD instructions
CC'05 Proceedings of the 14th international conference on Compiler Construction
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We address the problem of code-size minimization in VLSI systems with embedded DSP processors. Reducing code size reduces the production cost of embedded systemswe use data-compression methods to develop code-size minimization strategies. In our framework, the compressed program consists of a skeleton and a dictionary. We show that the dictionary can be computed by solving a set-covering problem derived from the original program. To execute the compressed code, we describe two methods that have different performance characteristics and different degrees of freedom in compressing the code. We also address performance considerations, and show that they can be incorporated easily into the set-covering formulation, and present experimental results obtained with Texas Instruments' optimizing TMS3220C25 compiler.