Compression of Embedded System Programs

Improving code density using compression techniques

MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture

Procedure based program compression

MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture

Code compression for embedded systems

DAC '98 Proceedings of the 35th annual Design Automation Conference

Code compression based on operand factorization

MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture

A text-compression-based method for code size minimization in embedded systems

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Enhanced code compression for embedded RISC processors

Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation

Compiler-driven cached code compression schemes for embedded ILP processors

Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture

Evaluation of a high performance code compression method

Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture

Low-cost branch folding for embedded applications with small tight loops

Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture

Sparse code motion

Proceedings of the 27th ACM SIGPLAN-SIGACT symposium on Principles of programming languages

Procedure Based Program Compression

International Journal of Parallel Programming - Special issue on the 30th annual ACM/IEEE international symposium on microarchitecture, part II

Very low power pipelines using significance compression

Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture

Code size minimization and retargetable assembly for custom EPIC and VLIW instruction formats

ACM Transactions on Design Automation of Electronic Systems (TODAES)

High-performance extendable instruction set computing

ACSAC '01 Proceedings of the 6th Australasian conference on Computer systems architecture

Area and power reduction of embedded DSP systems using instruction compression and re-configurable encoding

Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design

The performance advantage of applying compression to the memory system

Proceedings of the 2002 workshop on Memory system performance

A High-Speed Asynchronous Decompression Circuit for Embedded Processors

ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)

Generation of fast interpreters for Huffman compressed bytecode

Proceedings of the 2003 workshop on Interpreters, virtual machines and emulators

Survey of code-size reduction methods

ACM Computing Surveys (CSUR)

Variable Instruction Set Architecture and Its Compiler Support

IEEE Transactions on Computers

Reducing code size with echo instructions

Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems

Reducing code size for heterogeneous-connectivity-based VLIW DSPs through synthesis of instruction set extensions

Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems

Code Size Reduction in Heterogeneous-Connectivity-Based DSPs Using Instruction Set Extensions

IEEE Transactions on Computers

A Distributed Control Path Architecture for VLIW Processors

Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques

Profile-driven compression scheme for embedded systems

Proceedings of the 3rd conference on Computing frontiers

Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding

Journal of VLSI Signal Processing Systems

Generation of fast interpreters for Huffman compressed bytecode

Science of Computer Programming - Special issue on advances in interpreters, virtual machines and emulators (IVME'03)

Revisiting Java Bytecode Compression for Embedded and Mobile Computing Environments

IEEE Transactions on Software Engineering

Selective Code Compression Scheme for Embedded Systems

Transactions on High-Performance Embedded Architectures and Compilers I

Dictionary-based program compression on customizable processor architectures

Microprocessors & Microsystems

Code density concerns for new architectures

ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design

Code compression for embedded VLIW processors using variable-to-fixed coding

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

TinyVM: an energy-efficient execution infrastructure for sensor networks

Software—Practice & Experience