Combining the concepts of compression and caching for a two-level filesystem
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
IMPACT: an architectural framework for multiple-instruction-issue processors
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Executing compressed programs on an embedded RISC architecture
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Compression of Embedded System Programs
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Code density optimization for embedded DSP processors using data compression techniques
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Efficient implementation of the smalltalk-80 system
POPL '84 Proceedings of the 11th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Enhanced code compression for embedded RISC processors
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Evaluation of a high performance code compression method
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Proceedings of the 27th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Frequent value locality and value-centric data cache design
ACM SIGPLAN Notices
Frequent value compression in data caches
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Frequent value locality and value-centric data cache design
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Tuning of loop cache architectures to programs in embedded system design
Proceedings of the 15th international symposium on System Synthesis
Sifting out the mud: low level C++ code reuse
OOPSLA '02 Proceedings of the 17th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Synthesis of customized loop caches for core-based embedded systems
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Code optimization for code compression
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
A DISE implementation of dynamic code decompression
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Cold code decompression at runtime
Communications of the ACM - Program compaction
Survey of code-size reduction methods
ACM Computing Surveys (CSUR)
Compact Binaries with Code Compression in a Software Dynamic Translator
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Optimizing Address Code Generation for Array-Intensive DSP Applications
Proceedings of the international symposium on Code generation and optimization
Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
The implementation and evaluation of dynamic code decompression using DISE
ACM Transactions on Embedded Computing Systems (TECS)
A compressed memory hierarchy using an indirect index cache
WMPI '04 Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture
Link-time binary rewriting techniques for program compaction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Profile-driven compression scheme for embedded systems
Proceedings of the 3rd conference on Computing frontiers
ACM Transactions on Programming Languages and Systems (TOPLAS)
Link-time compaction and optimization of ARM executables
ACM Transactions on Embedded Computing Systems (TECS)
FPGA-friendly code compression for horizontal microcoded custom IPs
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Automated reduction of the memory footprint of the Linux kernel
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Access pattern-based code compression for memory-constrained systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Selective Code Compression Scheme for Embedded Systems
Transactions on High-Performance Embedded Architectures and Compilers I
Code compaction of matching single-entry multiple-exit regions
SAS'03 Proceedings of the 10th international conference on Static analysis
Studying the code compression design space - A synthesis approach
Journal of Systems Architecture: the EUROMICRO Journal
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Cost and power consumption are two of the most important design factors for many embedded systems, particularly consumer devices. Products such as personal digital assistants, pagers with integrated data services and smart phones have fixed performance requirements but unlimited appetites for reduced cost and increased battery life. Program compression is one technique that can be used to attack both of these problems. Compressed programs require less memory, thus reducing the cost of both direct materials and manufacturing. Furthermore, by relying on compressed memory, the total number of memory references is reduced. This reduction saves power by lowering the traffic on high-capacitance buses. This paper discusses a new approach to implementing transparent program compression that requires little or no hardware support. Procedures are compressed individually, and a directory structure is used to bind them together at run-time. Decompressed procedures are explicitly cached in ordinary RAM as complete units, thus resolving references within each procedure. This approach has been evaluated on a set of 25 embedded multimedia and communications applications, and results in an average memory reduction of 40% with a run-time performance overhead of 10%.