Proceedings of the 37th Annual Design Automation Conference
BEOL variability and impact on RC extraction
Proceedings of the 42nd annual Design Automation Conference
CAD tools for variation tolerance
Proceedings of the 42nd annual Design Automation Conference
Wire density driven global routing for CMP variation and timing
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Metal-density driven placement for cmp variation and routability
Proceedings of the 2008 international symposium on Physical design
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe
Variational capacitance extraction of on-chip interconnects based on continuous surface model
Proceedings of the 46th Annual Design Automation Conference
D-A converter based variation analysis for analog layout design
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
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Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include inter-and intra-die variations of geometries, as well as process and electrical parameters. In this paper, pattern (i.e. density, width and space) dependent interconnect thickness and width variations are studied based on a well-designed test chip in a 90 nm technology. The parasitic resistance and capacitance variations due to the process variations are investigated, and process-variation-aware extraction techniques are proposed. In the test chip, electrical and physical measurements show strong metal thickness and width variations mainly due to chemical mechanical polishing (CMP) in nanometer technologies. The loop inductance dependence of return patterns is also validated in the test chip. The proposed new characterization methods extract interconnect RC variations as a function of metal density, width and space. Simulation results show excellent agreement between on-wafer measurements and extractions of various RC structures, including a set of metal loaded/unloaded ring oscillators in a complex wiring environment.