Wire density driven global routing for CMP variation and timing

Authors:
Minsik Cho;David Z. Pan;Hua Xiang;Ruchir Puri
Affiliations:
Univ. of Texas at Austin, Austin, TX;Univ. of Texas at Austin, Austin, TX;IBM T. J. Watson Research Center, Yorktown Heights, NY;IBM T. J. Watson Research Center, Yorktown Heights, NY
Venue:
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Year:
2006

Citing 19
Cited 21

Techniques for crosstalk avoidance in the physical design of high-performance digital systems

ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
TACO: timing analysis with coupling

Proceedings of the 37th Annual Design Automation Conference
A timing-constrained algorithm for simultaneous global routing of multiple nets

Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Improved global routing through congestion estimation

Proceedings of the 40th annual Design Automation Conference
Impact of Interconnect Pattern Density Information on a 90nm Technology ASIC Design Flow

ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
Investigation of the capacitance deviation due to metal-fills and the effective interconnect geometry modeling

ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
A Fast Crosstalk- and Performance-Driven Multilevel Routing System

Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Coupling aware timing optimization and antenna avoidance in layer assignment

Proceedings of the 2005 international symposium on Physical design
A novel timing-driven global routing algorithm considering coupling effects for high performance circuit design

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Timing driven track routing considering coupling capacitance

Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies

GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
BoxRouter: a new global router based on box expansion and progressive ILP

Proceedings of the 43rd annual Design Automation Conference
Crosstalk reduction for VLSI

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing with crosstalk constraints

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing by new approximation algorithms for multicommodity flow

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pattern routing: use and theory for increasing predictability and avoiding coupling

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Early probabilistic noise estimation for capacitively coupled interconnects

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On integrating power and signal routing for shield count minimization in congested regions

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Design and CAD challenges in 45nm CMOS and beyond

Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
High-performance routing at the nanometer scale

Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
BoxRouter 2.0: architecture and implementation of a hybrid and robust global router

Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Novel wire density driven full-chip routing for CMP variation control

Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Sidewinder: a scalable ILP-based router

Proceedings of the 2008 international workshop on System level interconnect prediction
Metal-density driven placement for cmp variation and routability

Proceedings of the 2008 international symposium on Physical design
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond

Proceedings of the 2008 Asia and South Pacific Design Automation Conference
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction

Proceedings of the 45th annual Design Automation Conference
Full-chip routing system for reducing Cu CMP & ECP variation

Proceedings of the 21st annual symposium on Integrated circuits and system design
BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multi-layer global routing considering via and wire capacities

Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A novel wire-density-driven full-chip routing system for CMP variation control

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ELIAD: efficient lithography aware detailed routing algorithm with compact and macro post-OPC printability prediction

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Routing for manufacturability and reliability

IEEE Circuits and Systems Magazine
Dummy fill optimization for enhanced manufacturability

Proceedings of the 19th international symposium on Physical design
Density gradient minimization with coupling-constrained dummy fill for CMP control

Proceedings of the 19th international symposium on Physical design
Multilayer global routing with via and wire capacity considerations

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ECP- and CMP-aware detailed routing algorithm for DFM

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Track routing optimizing timing and yield

Proceedings of the 16th Asia and South Pacific Design Automation Conference
Simultaneous OPC- and CMP-aware routing based on accurate closed-form modeling

Proceedings of the 2013 ACM international symposium on International symposium on physical design
Techniques for scalable and effective routability evaluation

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Quantified Score

Hi-index	0.00

Visualization

Abstract

In this paper, we propose the first wire density driven global routing that considers CMP variation and timing. To enable CMP awareness during global routing, we propose a compact predictive CMP model with dummy fill, and validate it with extensive industry data. While wire density has some correlation and similarity to the conventional congestion metric, they are indeed different in the global routing context. Therefore, wire density rather than congestion should be a unified metric to improve both CMP variation and timing. The proposed wire density driven global routing is implemented in a congestion-driven global router [5] for CMP and timing optimization. The new global router utilizes several novel techniques to reduce the wire density of CMP and timing hotspots. Our experimental results are very encouraging. The proposed algorithm improves CMP variation and timing by over 7% with negligible overhead in wirelength and even slightly better routability, compared to the pure congestion-driven global router [5].