Reducing Burn-in Time through High-Voltage Stress Test and Weibull Statistical Analysis

Authors:
Mohd Fairuz Zakaria;Zainal Abu Kassim;Melanie Po-Leen Ooi;Serge Demidenko
Affiliations:
Freescale Semiconductor, Malaysia;Freescale Semiconductor, Malaysia;Monash University Malaysia;Monash University Malaysia
Venue:
IEEE Design & Test
Year:
2006

Citing 3
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Abstract

Editor's note: High-voltage stress testing (HVST) is common in IC manufacturing, but publications comparing it with other test and burn-in methods are scarce. This article shows that the use of HVST can dramatically reduce the amount of required burn-in.--Phil Nigh, IBM Microelectronics