Introduction to algorithms
Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Some efficient solutions to the affine scheduling problem: I. One-dimensional time
International Journal of Parallel Programming
Scheduling using behavioral templates
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Principles of digital design
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Introduction to the Scheduling Problem
IEEE Design & Test
Constraints-driven scheduling and resource assignment
ACM Transactions on Design Automation of Electronic Systems (TODAES)
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A new symbolic technique for control-dependent scheduling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Scheduling is an important step in high-level synthesis (HLS). In our tool, we perform scheduling in two steps: coarse-grain scheduling, in which we take into account the whole control structure of the program including imperfect loop nests, and fine-grain scheduling, where we refine each logical step using a detailed description of the available resources. This paper focuses on the second step. Tasks are modeled as reservation tables (or templates) and we express resource constraints using dis-equations (i.e., negations of equations). We give an exact algorithm based on a branch-and-bound method, coupled with variants of Dijkstra's algorithm, which we compare with a greedy heuristic. Both algorithms are tested on pieces of scientific applications to demonstrate their suitability for HLS tools.