Evolutionary Design of Digital Circuits: Where Are Current Limits?

Authors:
Lukas Sekanina
Affiliations:
Brno University of Technology, Czech Republic
Venue:
AHS '06 Proceedings of the first NASA/ESA conference on Adaptive Hardware and Systems
Year:
2006

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Abstract

The objective of this paper is to classify the approaches proposed to the evolutionary digital circuit design in the recent years and to identify the levels of complexity and innovation that can be obtained by means of these approaches. In particular, gate-level evolution, circuit evolution in PLAs, functional-level evolution, incremental evolution, evolution utilizing developmental schemes and some application-specific schemes are analyzed. It is shown that we are able to effectively explore the search spaces not much larger than 2^1000 points and that the innovative solutions can be produced independently of the utilized method.