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ACM Transactions on Programming Languages and Systems (TOPLAS)
Toward a dataflow/von Neumann hybrid architecture
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C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
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The Epsilon dataflow processor
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Executing a Program on the MIT Tagged-Token Dataflow Architecture
IEEE Transactions on Computers
Limits of control flow on parallelism
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Transactional memory: architectural support for lock-free data structures
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ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Speculative multithreaded processors
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A dynamic multithreading processor
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Data speculation support for a chip multiprocessor
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The Superthreaded Processor Architecture
IEEE Transactions on Computers
An architecture for mostly functional languages
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Partitioning parallel programs for macro-dataflow
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Monsoon: an explicit token-store architecture
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A scalable approach to thread-level speculation
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Space/time trade-offs in hash coding with allowable errors
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Architectural support for scalable speculative parallelization in shared-memory multiprocessors
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Execution-based prediction using speculative slices
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Slipstream processors: improving both performance and fault tolerance
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ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Dynamic speculative precomputation
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Speculative Multithreaded Processors
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Modern Concurrency Abstractions for C#
ECOOP '02 Proceedings of the 16th European Conference on Object-Oriented Programming
Master/slave speculative parallelization
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
The architecture and system method of DDM1: A recursively structured Data Driven Machine
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The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization
HPCA '98 Proceedings of the 4th International Symposium on High-Performance Computer Architecture
Exploiting Method-Level Parallelism in Single-Threaded Java Programs
PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
In Search of Speculative Thread-Level Parallelism
PACT '99 Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques
A Quantitative Assessment of Thread-Level Speculation Techniques
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
ReEnact: using thread-level speculation mechanisms to debug data races in multithreaded codes
Proceedings of the 30th annual international symposium on Computer architecture
The Jrpm system for dynamically parallelizing Java programs
Proceedings of the 30th annual international symposium on Computer architecture
Speculative Data-Driven Multithreading
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
iWatcher: Efficient Architectural Support for Software Debugging
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Programming with transactional coherence and consistency (TCC)
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-Based Invariants
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Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices
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Exposing speculative thread parallelism in SPEC2000
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Dynamic purity analysis for java programs
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Feasibility of decoupling memory management from the execution pipeline
Journal of Systems Architecture: the EUROMICRO Journal
A performance-correctness explicitly-decoupled architecture
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Exploiting Speculative TLP in Recursive Programs by Dynamic Thread Prediction
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Dynamic parallelization of single-threaded binary programs using speculative slicing
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Boosting single-thread performance in multi-core systems through fine-grain multi-threading
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Chip multiprocessor based on data-driven multithreading model
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A profile-based tool for finding pipeline parallelism in sequential programs
Parallel Computing
Self-replicating objects for multicore platforms
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Trebuchet: exploring TLP with dataflow virtualisation
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Dataflow execution of sequential imperative programs on multicore architectures
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Software data-triggered threads
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We present Program Demultiplexing (PD), an execution paradigm that creates concurrency in sequential programs by "demultiplexing" methods (functions or subroutines). Call sites of a demultiplexed method in the program are associated with handlers that allow the method to be separated from the sequential program and executed on an auxiliary processor. The demultiplexed execution of a method (and its handler) is speculative and occurs when the inputs of the method are (speculatively) available, which is typically far in advance of when the method is actually called in the sequential execution. A trigger, composed of predicates that are based on program counters and memory write addresses, launches the speculative execution of the method on another processor. Our implementation of PD is based on a full-system execution-based chip multi-processor simulator with software to generate triggers and handlers from an x86- program binary. We evaluate eight integer benchmarks from the SPEC2000 suite .programs written in C with no explicit concurrency and/or motivation to create concurrency. and achieve a harmonic mean speedup of 1.8x with our implementation of PD.