On-chip transient current monitor for testing of low-voltage CMOS IC
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Proceedings of the IEEE International Test Conference
On-Chip Signal Level Evaluation for Mixed-Signal ICs using Digital Window Comparators
ETW '01 Proceedings of the IEEE European Test Workshop (ETW'01)
Built-In Dynamic Current Sensor for Hard-to-Detect Faults in Mixed-Signal Ics
Proceedings of the conference on Design, automation and test in Europe
IDDX-based test methods: A survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Novel On-Chip Amplifier for Fast IDD Current Monitoring
Analog Integrated Circuits and Signal Processing
Structural Test Approach for Embedded Analog Circuits Based on a Built-in Current Sensor
Journal of Electronic Testing: Theory and Applications
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Switched current (SI) circuits use analogue memory cells as building blocks. In these cells, like in most analogue circuits, there are hard-to-detect faults with conventional test methods. A test approach based on a built-in dynamic current sensor (BIDCS), whose detection method weights the highest frequency components of the dynamic supply current of the circuit under test, makes possible the detection of these faults, taking into account the changes in the slope of the dynamic supply current induced by the fault. A study of the influence of these faults in neighbouring cells helps to minimize the number of BICS needed in SI circuits as is shown in two algorithmic analogue-to-digital converters.