Design of a high-speed square root multiply and divide unit
IEEE Transactions on Computers
On-the-fly conversion of redundant into conventional representations
IEEE Transactions on Computers
Division and Square Root: Digit-Recurrence Algorithms and Implementations
Division and Square Root: Digit-Recurrence Algorithms and Implementations
Higher Radix Square Root with Prescaling
IEEE Transactions on Computers - Special issue on computer arithmetic
A Radix 2 Shared Division/Square Root Algorithm and its VLSI Architecture
Journal of VLSI Signal Processing Systems
IEEE Transactions on Computers
Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root
IEEE Transactions on Computers
Digit Selection for SRT Division and Square Root
IEEE Transactions on Computers
Reciprocal and Reciprocal Square Root Units with Operand Modification and Multiplication
Journal of VLSI Signal Processing Systems
A Digit-by-Digit Algorithm for mth Root Extraction
IEEE Transactions on Computers
| Hi-index | 14.99 |
A systematic derivation of a radix-4 square-root algorithm using redundant residual and result is presented. Unlike other similar schemes it does not use a table lookup or PLA for the initial step, resulting in a simpler implementation without any time penalty. The scheme can be integrated with division and incorporates an on-the-fly conversion and rounding of the result, thus eliminating a carry-propagate step to obtain the final result. The result-digit selection uses 3 bits of the result and 7 bits of the estimate of the residual.