Delay optimization of linear depth boolean circuits with prescribed input arrival times

  • Authors:
  • Dieter Rautenbach;Christian Szegedy;Jürgen Werber

  • Affiliations:
  • Forschungsinstitut für Diskrete Mathematik, Lennéstr. 2, D-53113 Bonn, Germany;Forschungsinstitut für Diskrete Mathematik, Lennéstr. 2, D-53113 Bonn, Germany;Forschungsinstitut für Diskrete Mathematik, Lennéstr. 2, D-53113 Bonn, Germany

  • Venue:
  • Journal of Discrete Algorithms
  • Year:
  • 2006

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Abstract

We consider boolean circuits C over the basis @W={@?,@?} with inputs x"1, x"2,...,x"n for which arrival times t"1,t"2,...,t"n@?N"0 are given. For 1=