A remark concerning m-divisibility and the discrete logarithm in the divisor class group of curves
Mathematics of Computation
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Elliptic Curve Public Key Cryptosystems
Elliptic Curve Public Key Cryptosystems
On Computing Multiplicative Inverses in GF(2/sup m/)
IEEE Transactions on Computers
Efficient Algorithms for Pairing-Based Cryptosystems
CRYPTO '02 Proceedings of the 22nd Annual International Cryptology Conference on Advances in Cryptology
Fast Implementation of Elliptic Curve Arithmetic in GF(pn)
PKC '00 Proceedings of the Third International Workshop on Practice and Theory in Public Key Cryptography: Public Key Cryptography
ANTS-V Proceedings of the 5th International Symposium on Algorithmic Number Theory
Advances in Elliptic Curve Cryptography (London Mathematical Society Lecture Note Series)
Advances in Elliptic Curve Cryptography (London Mathematical Society Lecture Note Series)
Parallel Hardware Architectures for the Cryptographic Tate Pairing
ITNG '06 Proceedings of the Third International Conference on Information Technology: New Generations
An Embedded Processor for a Pairing-Based Cryptosystem
ITNG '06 Proceedings of the Third International Conference on Information Technology: New Generations
Hardware acceleration of the tate pairing in characteristic three
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Efficient hardware for the tate pairing calculation in characteristic three
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Reducing elliptic curve logarithms to logarithms in a finite field
IEEE Transactions on Information Theory
Pairing '08 Proceedings of the 2nd international conference on Pairing-Based Cryptography
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
FPGA and ASIC implementations of the ηT pairing in characteristic three
Computers and Electrical Engineering
Compact hardware for computing the tate pairing over 128-bit-security supersingular curves
Pairing'10 Proceedings of the 4th international conference on Pairing-based cryptography
Optimal eta pairing on supersingular genus-2 binary hyperelliptic curves
CT-RSA'12 Proceedings of the 12th conference on Topics in Cryptology
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Many novel and interesting cryptographic protocols have recently been designed with bilinear pairings comprising their main calculation. The @h"T method for pairing calculation is an efficient computation technique based on a generalisation and optimisation of the Duursma-Lee algorithm for calculating the Tate pairing. The pairing can be computed very efficiently on hyperelliptic curves of genus 2. In this paper it is demonstrated that the @h"T method is ideally suited for hardware implementation since much of the more intensive arithmetic can be performed in parallel in hardware. A Tate pairing processor is presented and the architectures required for such a system are discussed. The processor returns a fast pairing computation when compared to the best results in the literature to date. Results are provided when the processor is implemented on an FPGA over the base field F"2"^"1"^"0"^"3.