Performance Modelling with Deterministic and Stochostic Petri Nets
Performance Modelling with Deterministic and Stochostic Petri Nets
Modeling a scalable high-speed interconnect with stochastic Petri nets
PNPM '95 Proceedings of the Sixth International Workshop on Petri Nets and Performance Models
Networks on chip
A modular simulation framework for architectural exploration of on-chip interconnection networks
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Application specific NoC design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A survey of research and practices of Network-on-chip
ACM Computing Surveys (CSUR)
Journal of VLSI Signal Processing Systems
System-level performance analysis for designing on-chip communication architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Modeling networking issues of network-on-chip: a coloured petri nets approach
Proceedings of the 2nd International Conference on Simulation Tools and Techniques
NoC simulation modeling in DEVS-suite
Proceedings of the 2011 Symposium on Theory of Modeling & Simulation: DEVS Integrative M&S Symposium
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The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Chip (NoCs). Recently, the application of deterministic and stochastic Petri-Nets (DSPNs) to model on-chip communication has been proven to be an attractive method to evaluate and explore different communication aspects. In this contribution the modeling of basic NoC communication scenarios featuring different processor cores, network topologies and communication schemes is presented. In order to provide a testbed for the verification of modeling results a state-of-the-art FPGA-platform has been utilized. This platform allows to instantiate a soft-core processor network which can be adapted in terms of communication network topologies and communication schemes. It will be shown that DSPN modeling yields good communication performance prediction results at low modeling effort. Different DSPN modeling aspects in terms of accuracy and computational effort are discussed.