Logical Time in Distributed Computing Systems
Computer - Distributed computing systems: separate resources acting as one
A partial approach to model checking
Papers presented at the IEEE symposium on Logic in computer science
Local and temporal predicates in distributed systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Distributed snapshots: determining global states of distributed systems
ACM Transactions on Computer Systems (TOCS)
Monitoring functions on global states of distributed programs
Journal of Parallel and Distributed Computing
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Bandera: extracting finite-state models from Java source code
Proceedings of the 22nd international conference on Software engineering
Programmers use slices when debugging
Communications of the ACM
Time, clocks, and the ordering of events in a distributed system
Communications of the ACM
Verisim: Formal Analysis of Network Simulations
IEEE Transactions on Software Engineering
Elements of distributed computing
Elements of distributed computing
Symbolic Model Checking
Detection of Weak Unstable Predicates in Distributed Programs
IEEE Transactions on Parallel and Distributed Systems
Detecting Temporal Logic Predicates on the Happened-Before Model
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Using Runtime Analysis to Guide Model Checking of Java Programs
Proceedings of the 7th International SPIN Workshop on SPIN Model Checking and Software Verification
The Temporal Rover and the ATG Rover
Proceedings of the 7th International SPIN Workshop on SPIN Model Checking and Software Verification
Computation Slicing: Techniques and Theory
DISC '01 Proceedings of the 15th International Conference on Distributed Computing
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
A Stubborn Attack On State Explosion
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
All from One, One for All: on Model Checking Using Representatives
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Software Fault Tolerance of Distributed Programs Using Computation Slicing
ICDCS '03 Proceedings of the 23rd International Conference on Distributed Computing Systems
On Detecting Global Predicates in Distributed Computations
ICDCS '01 Proceedings of the The 21st International Conference on Distributed Computing Systems
On Slicing a Distributed Computation
ICDCS '01 Proceedings of the The 21st International Conference on Distributed Computing Systems
Monitoring Java Programs with Java PathExplorer
Monitoring Java Programs with Java PathExplorer
Runtime safety analysis of multithreaded programs
Proceedings of the 9th European software engineering conference held jointly with 11th ACM SIGSOFT international symposium on Foundations of software engineering
Detection of global predicates: techniques and their limitations
Distributed Computing
Techniques for formal verification of concurrent and distributed program traces
Techniques for formal verification of concurrent and distributed program traces
Scaling model checking of dataraces using dynamic information
Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming
Solving Computation Slicing Using Predicate Detection
IEEE Transactions on Parallel and Distributed Systems
Partial order reduction for scalable testing of systemC TLM designs
Proceedings of the 45th annual Design Automation Conference
Predictive runtime verification of multi-processor SoCs in SystemC
Proceedings of the 45th annual Design Automation Conference
Actor-based slicing techniques for efficient reduction of Rebeca models
Science of Computer Programming
Repeated detection of conjunctive predicates in distributed executions
Information Processing Letters
Concurrency-oriented verification and coverage of system-level designs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Verification and coverage of message passing multicore applications
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
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Concurrent and distributed systems, such as System-on-Chips (SoCs), present an immense challenge for verification due to their complexity and inherent concurrency. Traditional approaches for eliminating errors in concurrent and distributed systems include formal methods and simulation. We present an approach toward combining formal methods and simulation in a technique called Predicate Detection (aka Runtime Verification), while avoiding the complexity of formal methods and the pitfalls of ad hoc simulation. Our technique enables efficient formal verification on execution traces of actual scalable systems. Traditional simulation methodologies are woefully inadequate in the presence of concurrency and subtle synchronization. The bug in the system may appear only when the ordering of concurrent events is different from the ordering in the simulation trace. We use a Partial Order Trace Model rather than the traditional total order trace model and we get the benefit of properly dealing with concurrent events and especially of detecting errors from analyzing successful total order traces. Surprisingly, checking properties, even on a finite partial order trace, is NP-complete in the size of the trace description (aka state-explosion problem). Our approach to ameliorating state explosion in partial order trace model uses two techniques: 1) slicing and 2) exploiting the structure of the property itself—by imposing restrictions—to evaluate its value efficiently for a given execution trace. Intuitively, the slice of a trace with respect to a property is a subtrace that contains all of the global states of the trace that satisfy the property such that it is computed efficiently (without traversing the state space) and represented concisely (without explicit representation of individual states). We present temporal slicing algorithms with respect to properties in temporal logic RCTL+. We show how to use the slicing algorithms for efficient predicate detection of design properties. We have developed a prototype system, Partial Order Trace Analyzer (POTA), which implements our algorithms. We verify several scalable and industrial protocols, including CORBA's General Inter-ORB Protocol, PCI-based System-on-Chip, ISO's Asynchronous Transfer Mode Ring, cache coherence, and mutual exclusion. Our experimental results indicate that slicing can lead to exponential reduction over existing techniques, such as the ones in SPIN model checker, both in time and space.