Operation and modeling of the MOS transistor
Operation and modeling of the MOS transistor
Introduction to microelectronic devices
Introduction to microelectronic devices
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Optimal Voltages and Sizing for Low Power
VLSID '99 Proceedings of the 12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
A design methodology for temperature variation insensitive low power circuits
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hi-index | 0.00 |
A design technique based on optimizing the supply voltage for simultaneously achieving energy efficiency and temperature variation insensitive circuit performance is proposed in this paper. The supply voltages that suppress the propagation delay variations when the temperature fluctuates are identified for a diverse set of circuits in 180 and 65nm CMOS technologies. Circuits display temperature variation insensitive propagation delay when operated at a supply voltage 44-47% lower than the nominal supply voltage (V"D"D=1.8V) in a 180nm CMOS technology. Similarly, the optimum supply voltages are 67-68% lower than the nominal supply voltage (V"D"D=1.0V) in a 65nm CMOS technology. At scaled supply voltages, integrated circuits consume lower power at the cost of reduced speed. The proposed design methodology of optimizing the supply voltage for temperature variation insensitive circuit performance is, therefore, particularly attractive for low-power applications with relaxed speed requirements. A new design methodology based on threshold voltage optimization for achieving temperature variation insensitive circuit speed is also evaluated. The energy per cycle and the propagation delay at the supply and threshold voltages providing temperature variation insensitive circuit performance, minimum energy-delay product, and minimum energy are compared. Results indicate that low-power operation and temperature variation tolerance can be simultaneously achieved with the proposed techniques.