Machine learning: paradigms and methods
Machine learning: paradigms and methods
Precomputation-based sequential logic optimization for low power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Rule induction with extension matrices
Journal of the American Society for Information Science - Special issue: knowledge discovery and data mining
Automating RT-level operand isolation to minimize power consumption in datapaths
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Dynamically Discovering Likely Program Invariants to Support Program Evolution
IEEE Transactions on Software Engineering - Special issue on 1999 international conference on software engineering
Machine Learning
Dynamic Power Management: Design Techniques and CAD Tools
Dynamic Power Management: Design Techniques and CAD Tools
IODINE: a tool to automatically infer dynamic invariants for hardware designs
Proceedings of the 42nd annual Design Automation Conference
Sequential logic optimization for low power using input-disabling precomputation architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A scalable algorithm for RTL insertion of gated clocks based on ODCs computation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Intelligate: Scalable Dynamic Invariant Learning for Power Reduction
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
MAGENTA: transaction-based statistical micro-architectural root-cause analysis
Proceedings of the 46th Annual Design Automation Conference
Logic synthesis for low power using clock gating and rewiring
Proceedings of the 20th symposium on Great lakes symposium on VLSI
The use of genetic algorithm to reduce power consumption during test application
ICES'10 Proceedings of the 9th international conference on Evolvable systems: from biology to hardware
On applying erroneous clock gating conditions to further cut down power
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Proceedings of the 48th Design Automation Conference
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We introduce a general framework, called PowerQuest, with the primary goal of extracting "interesting" dynamic invariants from a given simulation-trace database, and applying it to the power-reduction problem through detection of gating conditions. PowerQuest adopts machine-learning techniques for data mining. The advantages of PowerQuest in comparison with other state-of-the-art Dynamic Power Management (DPM) techniques are: 1) Quality of ODC conditions for gating 2) Minimization of extra logic added for gating. We demonstrate the validity of our approach in reducing power through experimental results using ITC99 benchmarks and real-life microprocessor test cases. We present up to 22.7 % power reduction in comparison with other DPM techniques.