Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Ultra-low power digital subthreshold logic circuits
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Robust subthreshold logic for ultra-low power operation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
IEEE Transactions on Circuits and Systems Part I: Regular Papers
ABRM: adaptive β-ratio modulation for process-tolerant ultradynamic voltage scaling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Most wireless and hand-held gadgets work in burst mode, and the performance demand varies with time. When the performance requirement is low, the supply voltage can be dithered and the circuit can enter from superthreshold region to subthreshold region (Vdd VT). Such ultra dynamic voltage scaling (UDVS), where the supply voltage switches from 1.2V to 200mV (say), enables remarkable decrease in power consumption with "acceptable" performance penalty in the non-burst mode of operation. However, subthreshold operation is very sensitive to process variation (PV) due to the reduced noise margin, and may not work properly unless corrective measures are taken. In this paper, we model the trip voltage in both subthreshold and superthreshold regions, and analyze the impact of PV in UDVS. We also propose a circuit design technique such that the same logic gate can efficiently operate in both superthreshold and subthreshold regions under PV. We do that by modulating the β-ratio (P-to-N ratio) of the logic gates. By proper β-ratio modulation, we show that the proposed methodologies can lower energy dissipation per cycle by more than an order of magnitude (42X) in non-burst mode with reduced impact to PVs.