Ten lectures on wavelets
Characterization of Signals from Multiscale Edges
IEEE Transactions on Pattern Analysis and Machine Intelligence
Implementation of a scalable MPEG-4 wavelet-based visual texture compression system
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
ITCC '00 Proceedings of the The International Conference on Information Technology: Coding and Computing (ITCC'00)
Video denoising algorithm in sliding 3D DCT domain
ACIVS'05 Proceedings of the 7th international conference on Advanced Concepts for Intelligent Vision Systems
FPGA design and implementation of a wavelet-domain video denoising system
ACIVS'05 Proceedings of the 7th international conference on Advanced Concepts for Intelligent Vision Systems
Design and real-time implementation of a 3-D rational filter for edge preserving smoothing
IEEE Transactions on Consumer Electronics
Accelerated image processing on FPGAs
IEEE Transactions on Image Processing
IEEE Transactions on Image Processing
Simultaneous recursive displacement estimation and restoration of noisy-blurred image sequences
IEEE Transactions on Image Processing
IEEE Transactions on Circuits and Systems for Video Technology
Combined line-based architecture for the 5-3 and 9-7 wavelet transform of JPEG2000
IEEE Transactions on Circuits and Systems for Video Technology
EURASIP Journal on Applied Signal Processing
Real-Time Wavelet-Spatial-Activity-Based Adaptive Video Enhancement Algorithm for FPGA
ACIVS '08 Proceedings of the 10th International Conference on Advanced Concepts for Intelligent Vision Systems
Journal of Signal Processing Systems
A new redundant binary booth encoding for fast 2n-bit multiplier design
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Use of wavelet for image processing in smart cameras with low hardware resources
Journal of Systems Architecture: the EUROMICRO Journal
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The use of field-programmable gate arrays (FPGAs) for digital signal processing (DSP) has increased with the introduction of dedicated multipliers, which allow the implementation of complex algorithms. This architecture is especially effective for data-intensive applications with extremes in data throughput. Recent studies prove that the FPGAs offer better solutions for real-time multiresolution video processing than any available processor, DSP or general-purpose. FPGA design of critically sampled discrete wavelet transforms has been thoroughly studied in literature over recent years. Much less research was done towards FPGA design of overcomplete wavelet transforms and advanced wavelet-domain video processing algorithms. This paper describes the parallel implementation of an advanced wavelet-domain noise filtering algorithm, which uses a nondecimated wavelet transform and spatially adaptive Bayesian wavelet shrinkage. The implemented arithmetic is decentralized and distributed over two FPGAs. The standard composite television video stream is digitalized and used as a source for real-time video sequences. The results demonstrate the effectiveness of the developed scheme for real-time video processing.