NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
A Low-Cost Deadlock-Free Design of Minimal-Table Rerouted XY-Routing for Irregular Wireless NoCs
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Proceedings of the Third International Workshop on Network on Chip Architectures
Fast and efficient processor allocation algorithm for torus-based chip multiprocessors
Computers and Electrical Engineering
A NoC-based hybrid message-passing/shared-memory approach to CMP design
Microprocessors & Microsystems
Bisection (band)width of product networks with application to data centers
TAMC'12 Proceedings of the 9th Annual international conference on Theory and Applications of Models of Computation
Power-efficient deterministic and adaptive routing in torus networks-on-chip
Microprocessors & Microsystems
Utility accrual object distribution in MPSoC real-time embedded systems
Journal of Computer and System Sciences
An analytical model for on-chip interconnects in multimedia embedded systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
A novel folded-torus based network architecture for power-aware multicore systems
Computers and Electrical Engineering
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Electrical engineers have learned how to build amazingly complex systems by assembling transistors, wires, and passive components into intricate networks. While solidly founded in semiconductor physics, pure engineering has made possible the design of ...