State Assignments for Asynchronous Sequential Machines
IEEE Transactions on Computers
Universal Single Transition Time Asynchronous State Assignments
IEEE Transactions on Computers
Realization of Fail-Safe Sequential Machines by Using a k-out-of-n Code
IEEE Transactions on Computers
Improved State Assignment Selection Tests
IEEE Transactions on Computers
Design of Asynchronous Circuits Assuming Unbounded Gate Delays
IEEE Transactions on Computers
Fault detecting experiments for sequential circuits
SWCT '64 Proceedings of the 1964 Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Autotesting Speed-Independent Sequential Circuits
IEEE Transactions on Computers
Design of Reliable Synchronous Sequential Circuits
IEEE Transactions on Computers
Asynchronous State Assignments with Unateness Properties and Fault-Secure Design
IEEE Transactions on Computers
Fail-Safe Asynchronous Sequential Machines
IEEE Transactions on Computers
Fail-Safe Asynchronous Machines with Multiple-Input Changes
IEEE Transactions on Computers
Comments on "Fault-Tolerant Asynchronous Networks"
IEEE Transactions on Computers
| Hi-index | 15.00 |
A design procedure is presented which allows for detection of faults in asynchronous sequential machines in a real time environment. Faults affecting both the output states and the internal operation of the machine are detected. The class of faults initially considered are single stuck-at-1 and stuck-at-0 faults. However, since the detection system presented is static and continuous, the class of faults detected will be greatly extended to include intermittent and a large number of multiple faults.