Ergodicity and Throughput Bounds of Petri Nets with Unique Consistent Firing Count Vector
IEEE Transactions on Software Engineering
Performance of iterative computation in self-timed rings
Journal of VLSI Signal Processing Systems - Special issue: asynchronous circuit design for VLSI signal processing
Understanding retiming through maximum average-delay cycles
Proceedings of the 3rd ACM symposium on Parallel algorithms and architectures
Integration, the VLSI Journal
Performance analysis and optimization of latency insensitive systems
Proceedings of the 37th Annual Design Automation Conference
A methodology for correct-by-construction latency insensitive design
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Slack Elasticity in Concurrent Computing
MPC '98 Proceedings of the Mathematics of Program Construction
ANALYSIS OF ASYNCHRONOUS CONCURRENT SYSTEMS BY TIMED PETRI NETS
ANALYSIS OF ASYNCHRONOUS CONCURRENT SYSTEMS BY TIMED PETRI NETS
Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
A method for correcting the functionality of a wire-pipelined circuit
Proceedings of the 41st annual Design Automation Conference
A new approach to latency insensitive design
Proceedings of the 41st annual Design Automation Conference
Retiming for Wire Pipelining in System-On-Chip
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Slack Matching Asynchronous Designs
ASYNC '06 Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems
Slack Matching Quasi Delay-Insensitive Circuits
ASYNC '06 Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems
Synthesis of synchronous elastic architectures
Proceedings of the 43rd annual Design Automation Conference
Utilizing the retiming-skew equivalence in a practical algorithm for retiming large circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance analysis of latency-insensitive systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Transactions on Petri Nets and Other Models of Concurrency I
Retiming and recycling for elastic systems with early evaluation
Proceedings of the 46th Annual Design Automation Conference
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Retiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, different models that provide exact solutions have already been proposed. An exact model for recycling was yet unknown. This paper presents a general formulation that covers the combination of the three schemes for performance optimization. It provides an exact model based on integer linear programming that resorts to the structural theory of marked graphs. A set of experiments has been designed to show the benefits in performance obtained by combining retiming and recycling. The results also show the applicability of the method in large circuits.