Coping with Latency in SOC Design
IEEE Micro
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Synthesis of synchronous elastic architectures
Proceedings of the 43rd annual Design Automation Conference
Performance analysis of concurrent systems with early evaluation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Synchronous elastic circuits with early evaluation and token counterflow
Proceedings of the 44th annual Design Automation Conference
A general model for performance optimization of sequential systems
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Correct-by-construction microarchitectural pipelining
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Theory of latency-insensitive design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Early evaluation for performance enhancement in phased logic
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Automatic microarchitectural pipelining
Proceedings of the Conference on Design, Automation and Test in Europe
Challenges in verifying communication fabrics
ITP'11 Proceedings of the Second international conference on Interactive theorem proving
Microarchitectural Transformations Using Elasticity
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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Retiming and recycling are two transformations used to optimize the performance of latency-insensitive (a.k.a. synchronous elastic) systems. This paper presents an approach that combines these two transformations for performance optimization of elastic systems with early evaluation. The method is based on Mixed Integer Linear Programming. On a set of random benchmarks the proposed method achieves, in average, 14.5% performance improvement over min-delay retiming configurations.