Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Using precomputation in architecture and logic resynthesis
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Proceedings of the 38th annual Design Automation Conference
High-level automatic pipelining for sequential circuits
Proceedings of the 14th international symposium on Systems synthesis
Synthesis of operation-centric hardware descriptions
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Coping with Latency in SOC Design
IEEE Micro
Synchronous Interlocked Pipelines
ASYNC '02 Proceedings of the 8th International Symposium on Asynchronus Circuits and Systems
Simplifying the design and automating the verification of pipelines with structural hazards
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Synthesis of synchronous elastic architectures
Proceedings of the 43rd annual Design Automation Conference
FMCAD '06 Proceedings of the Formal Methods in Computer Aided Design
Performance analysis of concurrent systems with early evaluation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Synchronous elastic circuits with early evaluation and token counterflow
Proceedings of the 44th annual Design Automation Conference
Using functional independence conditions to optimize the performance of latency-insensitive systems
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
The engineering design of the stretch computer
IRE-AIEE-ACM '59 (Eastern) Papers presented at the December 1-3, 1959, eastern joint IRE-AIEE-ACM computer conference
Theory of latency-insensitive design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Retiming and recycling for elastic systems with early evaluation
Proceedings of the 46th Annual Design Automation Conference
Speculation in elastic systems
Proceedings of the 46th Annual Design Automation Conference
Automatic multithreaded pipeline synthesis from transactional datapath specifications
Proceedings of the 47th Design Automation Conference
Automatic microarchitectural pipelining
Proceedings of the Conference on Design, Automation and Test in Europe
Automatic pipelining from transactional datapath specifications
Proceedings of the Conference on Design, Automation and Test in Europe
Exploiting local logic structures to optimize multi-core SoC floorplanning
Proceedings of the Conference on Design, Automation and Test in Europe
Microarchitectural Transformations Using Elasticity
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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This paper presents a method for correct-by-construction microarchitectural pipelining that handles cyclic systems with dependencies between iterations. Our method combines previously known bypass and retiming transformations with a few transformations valid only for elastic systems with early evaluation (namely, empty FIFO insertion, FIFO capacity sizing, insertion of anti-tokens, and introducing early evaluation multiplexors). By converting the design to a synchronous elastic form and then applying this extended set of transformations, one can pipeline a functional specification with an automatically generated distributed controller that implements stalling logic resolving data hazards off the critical path of the design. We have developed an interactive toolkit for exploring elastic microarchitectural transformations. The method is illustrated by pipelining a few simple examples of instruction set architecture ISA specifications.