FEKIS: a fast architecture-level thermal analyzer for online thermal regulation

  • Authors:
  • Pu Liu;Sheldon X.-D. Tan;Wei Wu;Murli Tirumala

  • Affiliations:
  • University of California, Riverside, Riverside, CA, USA;University of California, Riverside, Riverside, CA, USA;Intel Corporation, Santa Clara, CA, USA;Intel Corporation, Santa Clara, CA, USA

  • Venue:
  • Proceedings of the 18th ACM Great Lakes symposium on VLSI
  • Year:
  • 2008

Quantified Score

Hi-index 0.00

Visualization

Abstract

Owning to increasing power consumption and the corresponding heat dissipated on die, efficient on-chip temperature regulation becomes imperative for today's high performance microprocessors. Temperature tracking based on the on-chip thermal sensors is not sufficient as the temperature hot spots keep changing with the load. One way to mitigate this problem is by means of software sensors, where temperature of any location is computed based on realtime power information and calibrated with the physical sensors. In this paper, we present a very efficient numerical thermal analyzer, which is suitable for fast temperature tracking and online thermal regulation. The proposed method, called FEKIS, combines two existing numerical techniques: extended Krylov subspace reduction technique to reduce the thermal circuit complexity and large-step integration method to exploits the piecewise constant power input traces, which is typical in the power traces at the architecture level. Experimental results show that FEKIS runs 10X faster than the precise time-step integration method only and $1000X$ faster than the traditional numerical integration method with high accuracy.