Partial resolution for redundant operation table

  • Authors:
  • Byung-Soo Choi;Jun-Dong Cho

  • Affiliations:
  • School of Information and Communication, Sungkyunkwan University, Republic of Korea;School of Information and Communication, Sungkyunkwan University, Republic of Korea

  • Venue:
  • Microprocessors & Microsystems
  • Year:
  • 2008

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Abstract

In this work, we discuss several drawbacks of the conventional wide-width redundant operation table such as the waste of area cost and power consumption. We found that the waste of area cost and power consumption is caused by storing meaningless bits of the narrow-width operand values. Based on this analysis, we propose a way to avoid these storing of meaningless information of the narrow-width operands. The proposed method, partial resolution method, divides the conventional wide-width redundant operation table into two tables as the wide-width table for the half entries and the narrow-width table for the other half entries. The wide-width and the narrow-width redundant operation tables store different dynamic instructions whose operand values are wide and narrow, respectively. Since the narrow-width redundant operation table stores smaller number of bits, it requires lower area cost and also power consumption compared with the wide-width redundant operation table. The partial resolution method decreases the area cost by about 7% and 20% for the integer and the floating-point tables, respectively, and reduces the dynamic power consumption by about 34% and 30% for the integer and the floating-point tables, respectively, compared with the conventional wide-width redundant operation table with 2K entries. Meanwhile, the performance simulation with a high-end microarchitecture model and SPEC2000 benchmarks shows that the partial resolution method affects the performance very little, and even increases slightly in terms of IPC (Instruction per Cycle) value.