Reasoning about networks with many identical finite state processes
Information and Computation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Proceedings of the fourteenth annual ACM symposium on Principles of distributed computing
On optimistic methods for concurrency control
ACM Transactions on Database Systems (TODS)
The serializability of concurrent database updates
Journal of the ACM (JACM)
Model-checking of correctness conditions for concurrent objects
Information and Computation - Special issue: LICS 1996—Part 1
The notions of consistency and predicate locks in a database system
Communications of the ACM
Automatic verification of Pipelined Microprocessor Control
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Computing simulations on finite and infinite graphs
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Obstruction-Free Synchronization: Double-Ended Queues as an Example
ICDCS '03 Proceedings of the 23rd International Conference on Distributed Computing Systems
Software transactional memory for dynamic-sized data structures
Proceedings of the twenty-second annual symposium on Principles of distributed computing
Verifying Sequential Consistency on Shared-Memory Multiprocessors by Model Checking
IEEE Transactions on Parallel and Distributed Systems
Shared-memory mutual exclusion: major research trends since 1986
Distributed Computing - Papers in celebration of the 20th anniversary of PODC
Advanced contention management for dynamic software transactional memory
Proceedings of the twenty-fourth annual ACM symposium on Principles of distributed computing
Transactional Memory (Synthesis Lectures on Computer Architecture)
Transactional Memory (Synthesis Lectures on Computer Architecture)
Concurrent programming without locks
ACM Transactions on Computer Systems (TOCS)
CheckFence: checking consistency of concurrent data types on relaxed memory models
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Verifying Correctness of Transactional Memories
FMCAD '07 Proceedings of the Formal Methods in Computer Aided Design
On the correctness of transactional memory
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
DISC'06 Proceedings of the 20th international conference on Distributed Computing
Completeness and Nondeterminism in Model Checking Transactional Memories
CONCUR '08 Proceedings of the 19th international conference on Concurrency Theory
A Scalable and Oblivious Atomicity Assertion
CONCUR '08 Proceedings of the 19th international conference on Concurrency Theory
Permissiveness in Transactional Memories
DISC '08 Proceedings of the 22nd international symposium on Distributed Computing
The semantics of progress in lock-based transactional memory
Proceedings of the 36th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Transactional Memory: Glimmer of a Theory
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Software Transactional Memory on Relaxed Memory Models
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Perspectives on Transactional Memory
CONCUR 2009 Proceedings of the 20th International Conference on Concurrency Theory
Parameterized verification of transactional memories
PLDI '10 Proceedings of the 2010 ACM SIGPLAN conference on Programming language design and implementation
Proceedings of the twenty-second annual ACM symposium on Parallelism in algorithms and architectures
Extensible transactional memory testbed
Journal of Parallel and Distributed Computing
ACSC '10 Proceedings of the Thirty-Third Australasian Conferenc on Computer Science - Volume 102
Semantics of transactional memory and automatic mutual exclusion
ACM Transactions on Programming Languages and Systems (TOPLAS)
Runtime verification for software transactional memories
RV'10 Proceedings of the First international conference on Runtime verification
Verification of STM on relaxed memory models
Formal Methods in System Design
A framework for formally verifying software transactional memory algorithms
CONCUR'12 Proceedings of the 23rd international conference on Concurrency Theory
Verifying safety and liveness for the FlexTM hybrid transactional memory
Proceedings of the Conference on Design, Automation and Test in Europe
Hi-index | 0.00 |
Model checking software transactional memories (STMs) is difficult because of the unbounded number, length, and delay of concurrent transactions and the unbounded size of the memory. We show that, under certain conditions, the verification problem can be reduced to a finite-state problem, and we illustrate the use of the method by proving the correctness of several STMs, including two-phase locking, DSTM, TL2, and optimistic concurrency control. The safety properties we consider include strict serializability and opacity; the liveness properties include obstruction freedom, livelock freedom, and wait freedom. Our main contribution lies in the structure of the proofs, which are largely automated and not restricted to the STMs mentioned above. In a first step we show that every STM that enjoys certain structural properties either violates a safety or liveness requirement on some program with two threads and two shared variables, or satisfies the requirement on all programs. In the second step we use a model checker to prove the requirement for the STM applied to a most general program with two threads and two variables. In the safety case, the model checker constructs a simulation relation between two carefully constructed finite-state transition systems, one representing the given STM applied to a most general program, and the other representing a most liberal safe STM applied to the same program. In the liveness case, the model checker analyzes fairness conditions on the given STM transition system.