A methodology for statistical estimation of read access yield in SRAMs

Authors:
Mohamed H. Abu-Rahma;Kinshuk Chowdhury;Joseph Wang;Zhiqin Chen;Sei Seung Yoon;Mohab Anis
Affiliations:
Qualcomm Incorporated, San Diego, CA and University of Waterloo, Waterloo, ON;Qualcomm Incorporated, San Diego, CA;Qualcomm Incorporated, San Diego, CA;Qualcomm Incorporated, San Diego, CA;Qualcomm Incorporated, San Diego, CA;University of Waterloo, Waterloo, ON
Venue:
Proceedings of the 45th annual Design Automation Conference
Year:
2008

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Abstract

The increase of process variations in advanced CMOS technologies is considered one of the biggest challenges for SRAM designers. This is aggravated by the strong demand for lower cost and power consumption, higher performance and density which complicates SRAM design process. In this paper, we present a methodology for statistical simulation of SRAM read access yield, which is tightly related to SRAM performance and power consumption. The proposed flow enables early SRAM yield predication and performance/power optimization in the design time, which is important for SRAM in nanometer technologies. The methodology is verified using measured silicon yield data from a 1 Mb memory fabricated in an industrial 45nm technology.