An embedded infrastructure of debug and trace interface for the DSP platform

  • Authors:
  • Ming-Chang Hsieh;Chih-Tsun Huang

  • Affiliations:
  • National Tsing Hua University, Hsinchu, Taiwan;National Tsing Hua University, Hsinchu, Taiwan

  • Venue:
  • Proceedings of the 45th annual Design Automation Conference
  • Year:
  • 2008

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Abstract

The paper presents an infrastructure for debug and trace of the embedded digital signal processor (DSP) system, consisting of the in-system trace interface and its methodology to optimize the compression rate of the program and data traces. The platform has been implemented in a multimedia dual-core SOC design with little area overhead. Both the benchmark evaluation and realistic system integration justified the efficiency and effectiveness of our approach.