A data path layout assembler for high performance DSP circuits

  • Authors:
  • H. Cai;S. Note;P. Six;H. De Man

  • Affiliations:
  • IMEC Lab., Kapeldreef 75, 3030 Leuven, Belgium;IMEC Lab., Kapeldreef 75, 3030 Leuven, Belgium;IMEC Lab., Kapeldreef 75, 3030 Leuven, Belgium;IMEC Lab., Kapeldreef 75, 3030 Leuven, Belgium

  • Venue:
  • DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
  • Year:
  • 1991

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Abstract

A system is presented which automatically generates layout of bit-sliced data paths in high performance DSP circuits. The system consists of a linear placement tool, a track assignment tool and detailed layout tools. In this paper we will present algorithms for linear placement of modules and routing track assignment across the modules. By taking advantage of the inherent structure of the circuits an A* based linear placement algorithm has produced better results compared to a simulated annealing based approach.