An LSI random number generator (RNG)
Proceedings of CRYPTO 84 on Advances in cryptology
A Hardware Random Number Generator
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Compact FPGA-based True and Pseudo Random Number Generators
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
New Methods for Digital Generation and Postprocessing of Random Data
IEEE Transactions on Computers
A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks
IEEE Transactions on Computers
Design of testable random bit generators
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
How to turn loaded dice into fair coins
IEEE Transactions on Information Theory
A Design for a Physical RNG with Robust Entropy Estimators
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Fast Digital TRNG Based on Metastable Ring Oscillator
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Analysis and enhancement of random number generator in FPGA based on oscillator rings
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
New high entropy element for FPGA based true random number generators
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
SCA-resistant embedded processors: the next generation
Proceedings of the 26th Annual Computer Security Applications Conference
Combination of SW countermeasure and CPU modification on FPGA against power analysis
WISA'10 Proceedings of the 11th international conference on Information security applications
Using Data Contention in Dual-ported Memories for Security Applications
Journal of Signal Processing Systems
A closer look at security in random number generators design
COSADE'12 Proceedings of the Third international conference on Constructive Side-Channel Analysis and Secure Design
Hardware Cost Measurement of Lightweight Security Protocols
Wireless Personal Communications: An International Journal
A very high speed true random number generator with entropy assessment
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
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It is shown that the amount of true randomness produced by the recently introduced Galois and Fibonacci ring oscillators can be evaluated experimentally by restarting the oscillators from the same initial conditions and by examining the time evolution of the standard deviation of the oscillating signals. The restart approach is also applied to classical ring oscillators and the results obtained demonstrate that the new oscillators can achieve orders of magnitude higher entropy rates. A theoretical explanation is also provided. The restart and continuous modes of operation and a novel sampling method almost doubling the entropy rate are proposed. Accordingly, the new oscillators appear to be by far more effective than other known solutions for random number generation with logic gates only.