An embedded true random number generator for FPGAs
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Lessons learned using alloy to formally specify MLS-PCA trusted security architecture
Proceedings of the 2004 ACM workshop on Formal methods in security engineering
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis
IEEE Transactions on Computers
A hardware Memetic accelerator for VLSI circuit partitioning
Computers and Electrical Engineering
High Quality Uniform Random Number Generation Using LUT Optimised State-transition Matrices
Journal of VLSI Signal Processing Systems
A hardware generator of multi-point distributed random numbers for Monte Carlo simulation
Mathematics and Computers in Simulation
C is for circuits: capturing FPGA circuits as sequential code for portability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
High-Speed True Random Number Generation with Logic Gates Only
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
High speed true random number generator based on open loop structures in FPGAs
Microelectronics Journal
Using Data Contention in Dual-ported Memories for Security Applications
Journal of Signal Processing Systems
Designing a side channel resistant random number generator
CARDIS'10 Proceedings of the 9th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Application
Monte Carlo simulation of the Ising model on FPGA
Journal of Computational Physics
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Two FPGA based implementations of random numbergenerators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) which employs oscillator phase noise, andthe second is a bit serial implementation of a Blum BlumShub (BBS) pseudorandom number generator (PRNG).Both designs are extremely compact and can be implemented on any FPGA or PLD device. They were designedspecifically for use as FPGA based cryptographic hardwarecores. The TRNG and PRNG were tested using the NISTand Diehard random number test suites.