Random sequence generation by cellular automata
Advances in Applied Mathematics
Parallel Random Number Generation for VLSI Systems Using Cellular Automata
IEEE Transactions on Computers
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Maximally equidistributed combined Tausworthe generators
Mathematics of Computation
Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator
ACM Transactions on Modeling and Computer Simulation (TOMACS) - Special issue on uniform random number generation
The k-distribution of generalized feedback shift register pseudorandom numbers
Communications of the ACM
FPGA implementation of neighborhood-of-four cellular automata random number generators
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
True Random Number Generator Embedded in Reconfigurable Hardware
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Compact FPGA-based True and Pseudo Random Number Generators
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Gaussian Noise Generator for Hardware-Based Simulations
IEEE Transactions on Computers
On the xorshift random number generators
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Improved long-period generators based on linear recurrences modulo 2
ACM Transactions on Mathematical Software (TOMS)
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis
IEEE Transactions on Computers
FPGA-optimised high-quality uniform random number generators
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
A hardware framework for the fast generation of multiple long-period random number streams
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
State-of-the-art in heterogeneous computing
Scientific Programming
Power characterisation for fine-grain reconfigurable fabrics
International Journal of Reconfigurable Computing - Special issue on selected papers from spl 2009 programmable logic and applications
Multi-level customisation framework for curve based monte carlo financial simulations
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
High Performance FPGA-oriented Mersenne Twister Uniform Random Number Generator
Journal of Signal Processing Systems
The LUT-SR family of uniform random number generators for FPGA architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper presents a family of uniform random number generators designed for efficient implementation in Lookup table (LUT) based FPGA architectures. A generator with a period of 2 k 驴驴驴1 can be implemented using k flip-flops and k LUTs, and provides k random output bits each cycle. Each generator is based on a binary linear recurrence, with a state-transition matrix designed to make best use of all available LUT inputs in a given FPGA architecture, and to ensure that the critical path between all registers is a single LUT. This class of generator provides a higher sample rate per area than LFSR and Combined Tausworthe generators, and operates at similar or higher clock-rates. The statistical quality of the generators increases with k, and can be used to pass all common empirical tests such as Diehard, Crush and the NIST cryptographic test suite. Theoretical properties such as global equidistribution can also be calculated, and best and average case statistics shown. Due to the large number of random bits generated per cycle these generators can be used as a basis for generators with even higher statistical quality, and an example involving combination through addition is demonstrated.