Mapping switch-level simulation onto gate-level hardware accelerators

Authors:
Alok Jain;Randal E. Bryant
Affiliations:
Dept of ECE, Carnegie Mellon, Pittsburgh, PA;School of Computer Science, Carnegie Mellon, Pittsburgh, PA
Venue:
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Year:
1991

Citing 7
Cited 2

COSMOS: a compiled simulator for MOS circuits

DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
DAGON: technology binding and local optimization by DAG matching

DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Switch-level simulation of VLSI using a special-purpose data-driven computer

DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Application of Ternary Algebra to the Study of Static Hazards

Journal of the ACM (JACM)
Code Generation for Expressions with Common Subexpressions

Journal of the ACM (JACM)
Pattern Matching in Trees

Journal of the ACM (JACM)
Simulating pass transistor circuits using logic simulation machines

DAC '83 Proceedings of the 20th Design Automation Conference

Verity—a formal verification program for custom CMOS circuits

IBM Journal of Research and Development - Special issue: IBM CMOS technology
Modeling Custom Digital Circuits for Test

Journal of Electronic Testing: Theory and Applications

Quantified Score

Hi-index	0.01

Visualization

Abstract