Logic testing and design for testability
Logic testing and design for testability
The Multiple Observation Time Test Strategy
IEEE Transactions on Computers - Special issue on fault-tolerant computing
Functional test generation for FSMs by fault extraction
DAC '94 Proceedings of the 31st annual Design Automation Conference
On generating compact test sequences for synchronous sequential circuits
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Gate-level test generation for sequential circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DAC '98 Proceedings of the 35th annual Design Automation Conference
On the Role of Hardware Reset in Synchronous Sequential Circuit Test Generation
IEEE Transactions on Computers
Test sequence generation for controller verification and test with high coverage
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On achieving complete testability of synchronous sequential circuits with synchronizing sequences
ITC'94 Proceedings of the 1994 international conference on Test
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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