Performance of checksums and CRCs over real data
SIGCOMM '95 Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication
IEEE Micro
Data Integrity Evaluations of Reed Solomon Codes for Storage Systems
DFT '04 Proceedings of the Defect and Fault Tolerance in VLSI Systems, 19th IEEE International Symposium
A Data-Centric Approach to Checksum Reuse for Array-Intensive Applications
DSN '05 Proceedings of the 2005 International Conference on Dependable Systems and Networks
A Systematic Approach to Building High Performance Software-Based CRC Generators
ISCC '05 Proceedings of the 10th IEEE Symposium on Computers and Communications
Markov Models of Fault-Tolerant Memory Systems under SEU
MTDT '04 Proceedings of the Records of the 2004 International Workshop on Memory Technology, Design and Testing
Codes for Error Detection
Effectiveness data transmission error detection using check sum control for military application
MAMECTIS'08 Proceedings of the 10th WSEAS international conference on Mathematical methods, computational techniques and intelligent systems
Performance increase of error control operation on data transmission
NTMS'09 Proceedings of the 3rd international conference on New technologies, mobility and security
Transmission error correction based on the weighted checksum
MMACTEE'09 Proceedings of the 11th WSEAS international conference on Mathematical methods and computational techniques in electrical engineering
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Computer Systems used in Military and other challenging applications, are often exposed to increased levels of electromagnetic radiation. Embedded systems falling in this category often suffer from this exposure due to the operation of the device to which they belong. Consequently data communications within such devices need to be protected against transmission errors. Current general purpose encoding schemes that are used in other communication applications are prohibitively complex for this application. In this paper an innovative extension to the well known checksum concept is proposed that is capable of controlling errors in intra device data transfers. The new technique is shown to be simple enough for implementation and to increase the probability of detection of errors by several orders of magnitude. The scheme is hence shown to be suitable for embedded computing platforms for military and other demanding systems. More specifically, the modified checksum is examined in respect of its suitability for use in schemes for the transient error detection in schemes for reliable data storage within computing systems and it is explained why it is extremely suitable for this application. The modified checksum is also considered in the context of algorithm based fault tolerance schemes and it is again concluded that it can contribute to the overall scheme efficiency and effectiveness. The modified checksum is hence shown to be an algorithmic tool that can significantly contribute to the design of reliable and fault tolerant computing systems, such as the ones used for military systems or other applications that operate in adverse environments.